[Bf-blender-cvs] [960a005bab8] tmp-T80603: Fix T80603 Workbench: Inverted alpha when rendering

[Clément Foucault]

Commit: 960a005bab80fe577228d4c68db8b66f108f735a
Author: Clément Foucault
Date:   Mon Sep 14 11:59:58 2020 +0200
Branches: tmp-T80603
https://developer.blender.org/rB960a005bab80fe577228d4c68db8b66f108f735a

Fix T80603 Workbench: Inverted alpha when rendering

The state of the passes was not set back after the first sample.

This is a simpler fix than rBecfbc5fb55d5 which needs the new draw manager
features from 2.90.

===================================================================

M	source/blender/draw/engines/workbench/workbench_transparent.c

===================================================================

diff --git a/source/blender/draw/engines/workbench/workbench_transparent.c b/source/blender/draw/engines/workbench/workbench_transparent.c
index 39aa721a41c..1f51e02c3da 100644
--- a/source/blender/draw/engines/workbench/workbench_transparent.c
+++ b/source/blender/draw/engines/workbench/workbench_transparent.c
@@ -162,12 +162,15 @@ void workbench_transparent_draw_depth_pass(WORKBENCH_Data *data)
 
   if (do_transparent_depth_pass) {
     DRWState state = DRW_STATE_WRITE_COLOR | DRW_STATE_WRITE_DEPTH | DRW_STATE_DEPTH_LESS_EQUAL;
+    DRWState state_oit = DRW_STATE_WRITE_COLOR | DRW_STATE_DEPTH_LESS_EQUAL | DRW_STATE_BLEND_OIT;
 
     if (!DRW_pass_is_empty(psl->transp_accum_ps)) {
       GPU_framebuffer_bind(fbl->opaque_fb);
       /* TODO(fclem) Disable writting to first two buffers. Unecessary waste of bandwidth. */
       DRW_pass_state_set(psl->transp_accum_ps, state | wpd->cull_state | wpd->clip_state);
       DRW_draw_pass(psl->transp_accum_ps);
+      /* Set the state back to original. */
+      DRW_pass_state_set(psl->transp_accum_ps, state_oit | wpd->cull_state | wpd->clip_state);
     }
 
     if (!DRW_pass_is_empty(psl->transp_accum_infront_ps)) {
@@ -175,6 +178,9 @@ void workbench_transparent_draw_depth_pass(WORKBENCH_Data *data)
       /* TODO(fclem) Disable writting to first two buffers. Unecessary waste of bandwidth. */
       DRW_pass_state_set(psl->transp_accum_infront_ps, state | wpd->cull_state | wpd->clip_state);
       DRW_draw_pass(psl->transp_accum_infront_ps);
+      /* Set the state back to original. */
+      DRW_pass_state_set(psl->transp_accum_infront_ps,
+                         state_oit | wpd->cull_state | wpd->clip_state);
     }
   }
 }