[Bf-blender-cvs] [4a179e8e3e0] master: Atomics: Fix missing 64bit implementation for 32bit platforms

[Sergey Sharybin]

Commit: 4a179e8e3e0fe39b76baa3cba753491a8083de51
Author: Sergey Sharybin
Date:   Wed Nov 25 12:37:32 2020 +0100
Branches: master
https://developer.blender.org/rB4a179e8e3e0fe39b76baa3cba753491a8083de51

Atomics: Fix missing 64bit implementation for 32bit platforms

Blender uses 64bit atomics to manipulate SessionUUID, and these atomics
were not defined on any of 32bit platforms.

While official support is limited to 64bit platforms only, the code
should not make assumptions about bitness or endianess, in terms that
there should be codepaths and fallback (or provision of them) for 32bit
platforms.

This change makes 64bit atomic functions defined for all platforms.
The atomic_test was compiled and successfully tested on i686 and armv7l
platforms. The rest of compilation process of Blender will be very
tedious, so that was not done.

This change is essential, but not necessarily enough to make Blender
compilable on i686 (ability to compile Blender on 32bit platforms was
lost during the 2.91 development).

This is a functional part of original fix done by Brecht in D9577.

===================================================================

M	intern/atomic/atomic_ops.h
M	intern/atomic/intern/atomic_ops_msvc.h
M	intern/atomic/intern/atomic_ops_unix.h
M	intern/atomic/tests/atomic_test.cc

===================================================================

diff --git a/intern/atomic/atomic_ops.h b/intern/atomic/atomic_ops.h
index 91c6ab9fec5..e6ca7a105ba 100644
--- a/intern/atomic/atomic_ops.h
+++ b/intern/atomic/atomic_ops.h
@@ -59,7 +59,6 @@
 /******************************************************************************/
 /* Function prototypes. */
 
-#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
 ATOMIC_INLINE uint64_t atomic_add_and_fetch_uint64(uint64_t *p, uint64_t x);
 ATOMIC_INLINE uint64_t atomic_sub_and_fetch_uint64(uint64_t *p, uint64_t x);
 ATOMIC_INLINE uint64_t atomic_fetch_and_add_uint64(uint64_t *p, uint64_t x);
@@ -71,7 +70,6 @@ ATOMIC_INLINE int64_t atomic_sub_and_fetch_int64(int64_t *p, int64_t x);
 ATOMIC_INLINE int64_t atomic_fetch_and_add_int64(int64_t *p, int64_t x);
 ATOMIC_INLINE int64_t atomic_fetch_and_sub_int64(int64_t *p, int64_t x);
 ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new);
-#endif
 
 ATOMIC_INLINE uint32_t atomic_add_and_fetch_uint32(uint32_t *p, uint32_t x);
 ATOMIC_INLINE uint32_t atomic_sub_and_fetch_uint32(uint32_t *p, uint32_t x);
diff --git a/intern/atomic/intern/atomic_ops_msvc.h b/intern/atomic/intern/atomic_ops_msvc.h
index 9c68d74995d..356140541ba 100644
--- a/intern/atomic/intern/atomic_ops_msvc.h
+++ b/intern/atomic/intern/atomic_ops_msvc.h
@@ -46,7 +46,6 @@
 #endif
 
 /* 64-bit operations. */
-#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
 /* Unsigned */
 ATOMIC_INLINE uint64_t atomic_add_and_fetch_uint64(uint64_t *p, uint64_t x)
 {
@@ -98,7 +97,6 @@ ATOMIC_INLINE int64_t atomic_fetch_and_sub_int64(int64_t *p, int64_t x)
 {
   return InterlockedExchangeAdd64(p, -x);
 }
-#endif
 
 /******************************************************************************/
 /* 32-bit operations. */
diff --git a/intern/atomic/intern/atomic_ops_unix.h b/intern/atomic/intern/atomic_ops_unix.h
index 3b1b5c072e8..0de9daaaf5f 100644
--- a/intern/atomic/intern/atomic_ops_unix.h
+++ b/intern/atomic/intern/atomic_ops_unix.h
@@ -61,8 +61,7 @@
 
 /******************************************************************************/
 /* 64-bit operations. */
-#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
-#  if (defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) || defined(JE_FORCE_SYNC_COMPARE_AND_SWAP_8))
+#if (defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) || defined(JE_FORCE_SYNC_COMPARE_AND_SWAP_8))
 /* Unsigned */
 ATOMIC_INLINE uint64_t atomic_add_and_fetch_uint64(uint64_t *p, uint64_t x)
 {
@@ -115,7 +114,7 @@ ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new)
   return __sync_val_compare_and_swap(v, old, _new);
 }
 
-#  elif (defined(__amd64__) || defined(__x86_64__))
+#elif (defined(__amd64__) || defined(__x86_64__))
 /* Unsigned */
 ATOMIC_INLINE uint64_t atomic_fetch_and_add_uint64(uint64_t *p, uint64_t x)
 {
@@ -189,9 +188,8 @@ ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new)
   asm volatile("lock; cmpxchgq %2,%1" : "=a"(ret), "+m"(*v) : "r"(_new), "0"(old) : "memory");
   return ret;
 }
-#  else
-#    error "Missing implementation for 64-bit atomic operations"
-#  endif
+#else
+#  error "Missing implementation for 64-bit atomic operations"
 #endif
 
 /******************************************************************************/
diff --git a/intern/atomic/tests/atomic_test.cc b/intern/atomic/tests/atomic_test.cc
index f52422d0d30..6178b5074a7 100644
--- a/intern/atomic/tests/atomic_test.cc
+++ b/intern/atomic/tests/atomic_test.cc
@@ -14,11 +14,6 @@
 #  endif
 #endif
 
-/* NOTE: it is suboptimal to duplicate same check as in API, but this check is
- * planned to be removed, making it so 64bit intrinsics are available on 32bit
- * platforms. */
-#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
-
 /* -------------------------------------------------------------------- */
 /** \name 64 bit unsigned int atomics
  * \{ */
@@ -284,8 +279,6 @@ TEST(atomic, atomic_cas_int64)
 
 /** \} */
 
-#endif
-
 /* -------------------------------------------------------------------- */
 /** \name 32 bit unsigned int atomics
  * \{ */