[Bf-blender-cvs] [f1f2d9fe745] master: Fix T73442 Overlay: Wireframe infront buggy in material shading mode

[Clément Foucault]

Commit: f1f2d9fe745e37d7e7c286002ec3fa6243b499e3
Author: Clément Foucault
Date:   Tue Feb 11 18:37:21 2020 +0100
Branches: master
https://developer.blender.org/rBf1f2d9fe745e37d7e7c286002ec3fa6243b499e3

Fix T73442 Overlay: Wireframe infront buggy in material shading mode

This was caused by the refactor. The wireframe was drawn with the incorrect
depth buffer.

Should be included in 2.82

===================================================================

M	source/blender/draw/engines/overlay/overlay_wireframe.c

===================================================================

diff --git a/source/blender/draw/engines/overlay/overlay_wireframe.c b/source/blender/draw/engines/overlay/overlay_wireframe.c
index e39f51aa606..1d0c674f812 100644
--- a/source/blender/draw/engines/overlay/overlay_wireframe.c
+++ b/source/blender/draw/engines/overlay/overlay_wireframe.c
@@ -65,7 +65,7 @@ void OVERLAY_wireframe_cache_init(OVERLAY_Data *vedata)
   GPUShader *wires_sh = use_select ? OVERLAY_shader_wireframe_select() :
                                      OVERLAY_shader_wireframe();
 
-  for (int xray = 0; xray < 2; xray++) {
+  for (int xray = 0; xray < (is_material_shmode ? 1 : 2); xray++) {
     /* Only do stencil test if stencil buffer is written by the render engine. */
     DRWState stencil_state = is_material_shmode ? 0 : DRW_STATE_STENCIL_EQUAL;
     DRWState state = DRW_STATE_FIRST_VERTEX_CONVENTION | DRW_STATE_WRITE_COLOR |
@@ -104,6 +104,16 @@ void OVERLAY_wireframe_cache_init(OVERLAY_Data *vedata)
     DRW_shgroup_uniform_bool_copy(grp, "useColoring", false);
     DRW_shgroup_stencil_mask(grp, stencil_mask);
   }
+
+  if (is_material_shmode) {
+    /* Make all drawcalls go into the non-xray shading groups. */
+    for (int use_coloring = 0; use_coloring < 2; use_coloring++) {
+      pd->wires_grp[1][use_coloring] = pd->wires_grp[0][use_coloring];
+      pd->wires_all_grp[1][use_coloring] = pd->wires_all_grp[0][use_coloring];
+    }
+    pd->wires_sculpt_grp[1] = pd->wires_sculpt_grp[0];
+    psl->wireframe_xray_ps = NULL;
+  }
 }
 
 void OVERLAY_wireframe_cache_populate(OVERLAY_Data *vedata,
@@ -237,8 +247,10 @@ void OVERLAY_wireframe_in_front_draw(OVERLAY_Data *data)
   OVERLAY_PassList *psl = data->psl;
   OVERLAY_PrivateData *pd = data->stl->pd;
 
-  DRW_view_set_active(pd->view_wires);
-  DRW_draw_pass(psl->wireframe_xray_ps);
+  if (psl->wireframe_xray_ps) {
+    DRW_view_set_active(pd->view_wires);
+    DRW_draw_pass(psl->wireframe_xray_ps);
 
-  DRW_view_set_active(NULL);
+    DRW_view_set_active(NULL);
+  }
 }