[Bf-blender-cvs] [105b95835f4] master: atomic_ops: add signed versions of primitives.
Bastien Montagne
noreply at git.blender.org
Thu Nov 23 16:24:55 CET 2017
Commit: 105b95835f4da7cf3fa583ee2779ce3bff866891
Author: Bastien Montagne
Date: Thu Nov 23 16:13:23 2017 +0100
Branches: master
https://developer.blender.org/rB105b95835f4da7cf3fa583ee2779ce3bff866891
atomic_ops: add signed versions of primitives.
Reason is motsly that dealing with type conversion in calling code is
not great, makes it less readable, and can generate hidden bugs in case
original type changes and atomic primitive calls are not updated
accordingly...
===================================================================
M intern/atomic/atomic_ops.h
M intern/atomic/intern/atomic_ops_msvc.h
M intern/atomic/intern/atomic_ops_unix.h
===================================================================
diff --git a/intern/atomic/atomic_ops.h b/intern/atomic/atomic_ops.h
index 38670be56fd..7fab8f2ac57 100644
--- a/intern/atomic/atomic_ops.h
+++ b/intern/atomic/atomic_ops.h
@@ -82,6 +82,12 @@ ATOMIC_INLINE uint64_t atomic_sub_and_fetch_uint64(uint64_t *p, uint64_t x);
ATOMIC_INLINE uint64_t atomic_fetch_and_add_uint64(uint64_t *p, uint64_t x);
ATOMIC_INLINE uint64_t atomic_fetch_and_sub_uint64(uint64_t *p, uint64_t x);
ATOMIC_INLINE uint64_t atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _new);
+
+ATOMIC_INLINE int64_t atomic_add_and_fetch_int64(int64_t *p, int64_t x);
+ATOMIC_INLINE int64_t atomic_sub_and_fetch_int64(int64_t *p, int64_t x);
+ATOMIC_INLINE int64_t atomic_fetch_and_add_int64(int64_t *p, int64_t x);
+ATOMIC_INLINE int64_t atomic_fetch_and_sub_int64(int64_t *p, int64_t x);
+ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new);
#endif
ATOMIC_INLINE uint32_t atomic_add_and_fetch_uint32(uint32_t *p, uint32_t x);
@@ -92,9 +98,20 @@ ATOMIC_INLINE uint32_t atomic_fetch_and_add_uint32(uint32_t *p, uint32_t x);
ATOMIC_INLINE uint32_t atomic_fetch_and_or_uint32(uint32_t *p, uint32_t x);
ATOMIC_INLINE uint32_t atomic_fetch_and_and_uint32(uint32_t *p, uint32_t x);
+ATOMIC_INLINE int32_t atomic_add_and_fetch_int32(int32_t *p, int32_t x);
+ATOMIC_INLINE int32_t atomic_sub_and_fetch_int32(int32_t *p, int32_t x);
+ATOMIC_INLINE int32_t atomic_cas_int32(int32_t *v, int32_t old, int32_t _new);
+
+ATOMIC_INLINE int32_t atomic_fetch_and_add_int32(int32_t *p, int32_t x);
+ATOMIC_INLINE int32_t atomic_fetch_and_or_int32(int32_t *p, int32_t x);
+ATOMIC_INLINE int32_t atomic_fetch_and_and_int32(int32_t *p, int32_t x);
+
ATOMIC_INLINE uint8_t atomic_fetch_and_or_uint8(uint8_t *p, uint8_t b);
ATOMIC_INLINE uint8_t atomic_fetch_and_and_uint8(uint8_t *p, uint8_t b);
+ATOMIC_INLINE int8_t atomic_fetch_and_or_int8(int8_t *p, int8_t b);
+ATOMIC_INLINE int8_t atomic_fetch_and_and_int8(int8_t *p, int8_t b);
+
ATOMIC_INLINE size_t atomic_add_and_fetch_z(size_t *p, size_t x);
ATOMIC_INLINE size_t atomic_sub_and_fetch_z(size_t *p, size_t x);
ATOMIC_INLINE size_t atomic_fetch_and_add_z(size_t *p, size_t x);
diff --git a/intern/atomic/intern/atomic_ops_msvc.h b/intern/atomic/intern/atomic_ops_msvc.h
index 034ac1e3e53..ab31b3b789a 100644
--- a/intern/atomic/intern/atomic_ops_msvc.h
+++ b/intern/atomic/intern/atomic_ops_msvc.h
@@ -43,6 +43,7 @@
/******************************************************************************/
/* 64-bit operations. */
#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
+/* Unsigned */
ATOMIC_INLINE uint64_t atomic_add_and_fetch_uint64(uint64_t *p, uint64_t x)
{
return InterlockedExchangeAdd64((int64_t *)p, (int64_t)x) + x;
@@ -67,10 +68,37 @@ ATOMIC_INLINE uint64_t atomic_fetch_and_sub_uint64(uint64_t *p, uint64_t x)
{
return InterlockedExchangeAdd64((int64_t *)p, -((int64_t)x));
}
+
+/* Signed */
+ATOMIC_INLINE int64_t atomic_add_and_fetch_int64(int64_t *p, int64_t x)
+{
+ return InterlockedExchangeAdd64(p, x) + x;
+}
+
+ATOMIC_INLINE int64_t atomic_sub_and_fetch_int64(int64_t *p, int64_t x)
+{
+ return InterlockedExchangeAdd64(p, -x) - x;
+}
+
+ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new)
+{
+ return InterlockedCompareExchange64(v, _new, old);
+}
+
+ATOMIC_INLINE int64_t atomic_fetch_and_add_int64(int64_t *p, int64_t x)
+{
+ return InterlockedExchangeAdd64(p, x);
+}
+
+ATOMIC_INLINE int64_t atomic_fetch_and_sub_int64(int64_t *p, int64_t x)
+{
+ return InterlockedExchangeAdd64(p, -x);
+}
#endif
/******************************************************************************/
/* 32-bit operations. */
+/* Unsigned */
ATOMIC_INLINE uint32_t atomic_add_and_fetch_uint32(uint32_t *p, uint32_t x)
{
return InterlockedExchangeAdd(p, x) + x;
@@ -101,9 +129,41 @@ ATOMIC_INLINE uint32_t atomic_fetch_and_and_uint32(uint32_t *p, uint32_t x)
return InterlockedAnd((long *)p, x);
}
+/* Signed */
+ATOMIC_INLINE int32_t atomic_add_and_fetch_int32(int32_t *p, int32_t x)
+{
+ return InterlockedExchangeAdd(p, x) + x;
+}
+
+ATOMIC_INLINE int32_t atomic_sub_and_fetch_int32(int32_t *p, int32_t x)
+{
+ return InterlockedExchangeAdd(p, -x) - x;
+}
+
+ATOMIC_INLINE int32_t atomic_cas_int32(int32_t *v, int32_t old, int32_t _new)
+{
+ return InterlockedCompareExchange(v, _new, old);
+}
+
+ATOMIC_INLINE int32_t atomic_fetch_and_add_int32(int32_t *p, int32_t x)
+{
+ return InterlockedExchangeAdd(p, x);
+}
+
+ATOMIC_INLINE int32_t atomic_fetch_and_or_int32(int32_t *p, int32_t x)
+{
+ return InterlockedOr(p, x);
+}
+
+ATOMIC_INLINE int32_t atomic_fetch_and_and_int32(int32_t *p, int32_t x)
+{
+ return InterlockedAnd(p, x);
+}
+
/******************************************************************************/
/* 8-bit operations. */
+/* Unsigned */
#pragma intrinsic(_InterlockedAnd8)
ATOMIC_INLINE uint8_t atomic_fetch_and_and_uint8(uint8_t *p, uint8_t b)
{
@@ -124,4 +184,25 @@ ATOMIC_INLINE uint8_t atomic_fetch_and_or_uint8(uint8_t *p, uint8_t b)
#endif
}
+/* Signed */
+#pragma intrinsic(_InterlockedAnd8)
+ATOMIC_INLINE int8_t atomic_fetch_and_and_int8(int8_t *p, int8_t b)
+{
+#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
+ return InterlockedAnd8((char *)p, (char)b);
+#else
+ return _InterlockedAnd8((char *)p, (char)b);
+#endif
+}
+
+#pragma intrinsic(_InterlockedOr8)
+ATOMIC_INLINE int8_t atomic_fetch_and_or_int8(int8_t *p, int8_t b)
+{
+#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
+ return InterlockedOr8((char *)p, (char)b);
+#else
+ return _InterlockedOr8((char *)p, (char)b);
+#endif
+}
+
#endif /* __ATOMIC_OPS_MSVC_H__ */
diff --git a/intern/atomic/intern/atomic_ops_unix.h b/intern/atomic/intern/atomic_ops_unix.h
index 0a3322ad2b1..783a30f743b 100644
--- a/intern/atomic/intern/atomic_ops_unix.h
+++ b/intern/atomic/intern/atomic_ops_unix.h
@@ -58,6 +58,7 @@
/* 64-bit operations. */
#if (LG_SIZEOF_PTR == 8 || LG_SIZEOF_INT == 8)
# if (defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8) || defined(JE_FORCE_SYNC_COMPARE_AND_SWAP_8))
+/* Unsigned */
ATOMIC_INLINE uint64_t atomic_add_and_fetch_uint64(uint64_t *p, uint64_t x)
{
return __sync_add_and_fetch(p, x);
@@ -82,7 +83,35 @@ ATOMIC_INLINE uint64_t atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _ne
{
return __sync_val_compare_and_swap(v, old, _new);
}
+
+/* Signed */
+ATOMIC_INLINE int64_t atomic_add_and_fetch_int64(int64_t *p, int64_t x)
+{
+ return __sync_add_and_fetch(p, x);
+}
+
+ATOMIC_INLINE int64_t atomic_sub_and_fetch_int64(int64_t *p, int64_t x)
+{
+ return __sync_sub_and_fetch(p, x);
+}
+
+ATOMIC_INLINE int64_t atomic_fetch_and_add_int64(int64_t *p, int64_t x)
+{
+ return __sync_fetch_and_add(p, x);
+}
+
+ATOMIC_INLINE int64_t atomic_fetch_and_sub_int64(int64_t *p, int64_t x)
+{
+ return __sync_fetch_and_sub(p, x);
+}
+
+ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new)
+{
+ return __sync_val_compare_and_swap(v, old, _new);
+}
+
# elif (defined(__amd64__) || defined(__x86_64__))
+/* Unsigned */
ATOMIC_INLINE uint64_t atomic_fetch_and_add_uint64(uint64_t *p, uint64_t x)
{
asm volatile (
@@ -124,6 +153,49 @@ ATOMIC_INLINE uint64_t atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _ne
: "memory");
return ret;
}
+
+/* Signed */
+ATOMIC_INLINE int64_t atomic_fetch_and_add_int64(int64_t *p, int64_t x)
+{
+ asm volatile (
+ "lock; xaddq %0, %1;"
+ : "+r" (x), "=m" (*p) /* Outputs. */
+ : "m" (*p) /* Inputs. */
+ );
+ return x;
+}
+
+ATOMIC_INLINE int64_t atomic_fetch_and_sub_int64(int64_t *p, int64_t x)
+{
+ x = -x;
+ asm volatile (
+ "lock; xaddq %0, %1;"
+ : "+r" (x), "=m" (*p) /* Outputs. */
+ : "m" (*p) /* Inputs. */
+ );
+ return x;
+}
+
+ATOMIC_INLINE int64_t atomic_add_and_fetch_int64(int64_t *p, int64_t x)
+{
+ return atomic_fetch_and_add_int64(p, x) + x;
+}
+
+ATOMIC_INLINE int64_t atomic_sub_and_fetch_int64(int64_t *p, int64_t x)
+{
+ return atomic_fetch_and_sub_int64(p, x) - x;
+}
+
+ATOMIC_INLINE int64_t atomic_cas_int64(int64_t *v, int64_t old, int64_t _new)
+{
+ int64_t ret;
+ asm volatile (
+ "lock; cmpxchgq %2,%1"
+ : "=a" (ret), "+m" (*v)
+ : "r" (_new), "0" (old)
+ : "memory");
+ return ret;
+}
# else
# error "Missing implementation for 64-bit atomic operations"
# endif
@@ -132,6 +204,7 @@ ATOMIC_INLINE uint64_t atomic_cas_uint64(uint64_t *v, uint64_t old, uint64_t _ne
/******************************************************************************/
/* 32-bit operations. */
#if (defined(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4) || defined(JE_FORCE_SYNC_COMPARE_AND_SWAP_4))
+/* Unsigned */
ATOMIC_INLINE uint32_t atomic_add_and_fetch_uint32(uint32_t *p, uint32_t x)
{
return __sync_add_and_fetch(p, x);
@@ -146,7 +219,25 @@ ATOMIC_INLINE uint32_t atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _ne
{
return __sync_val_compare_and_swap(v, old, _new);
}
+
+/* Signed */
+ATOMIC_INLINE int32_t atomic_add_and_fetch_int32(int32_t *p, int32_t x)
+{
+ return __sync_add_and_fetch(p, x);
+}
+
+ATOMIC_INLINE int32_t atomic_sub_and_fetch_int32(int32_t *p, int32_t x)
+{
+ return __sync_sub_and_fetch(p, x);
+}
+
+ATOMIC_INLINE int32_t atomic_cas_int32(int32_t *v, int32_t old, int32_t _new)
+{
+ return __sync_val_compare_and_swap(v, old, _new);
+}
+
#elif (defined(__i386__) || defined(__amd64__) || defined(__x86_64__))
+/* Unsigned */
ATOMIC_INLINE uint32_t atomic_add_and_fetch_uint32(uint32_t *p, uint32_t x)
{
uint32_t ret = x;
@@ -155,18 +246,18 @@ ATOMIC_INLINE uint32_t atomic_add_and_fetch_uint32(uint32_t *p, uint32_t x)
: "+r" (ret), "=m" (*p) /* Outputs. */
: "m" (*p) /* Inputs. */
);
- return ret+x;
+ return ret + x;
}
ATOMIC_INLINE uint32_t atomic_sub_and_fetch_uint32(uint32_t *p, uint32_t x)
{
- ret = (uint32_t)(-(int32_t)x);
+ uint32_t ret = (uint32_t)(-(int32_t)x);
asm volatile (
"lock; xaddl %0, %1;"
: "+r" (ret), "=m" (*p) /* Outputs. */
: "m" (*p) /* Inputs. */
);
- return ret-x;
+ return ret - x;
}
ATOMIC_INLINE uint32_t atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _new)
@@ -179,11 +270,47 @@ ATOMIC_INLINE uint32_t atomic_cas_uint32(uint32_t *v, uint32_t old, uint32_t _ne
: "memory");
return
@@ Diff output truncated at 10240 characters. @@
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